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PRC: Research, Education, Industry

The Georgia Tech 3D Systems Packaging Research Center focuses on Smart, wearable, IOT, automotive, bio-electronics, and high-performance systems research. Leading-edge electronic systems research, cross-disciplinary education, and industry collaborations with 50+ global companies, make the PRC a leader in System-on-Package research.

3D Systems Packaging Research Center Industry Consortium Projects

This publication outlines the mission, strategy and expertise of the PRC faculty and team. Additionally, over 30 Industry Consortium Research Programs are detailed along with membership benefits and how your company become a partner.

Swaminathan Appointed as PRC Director  

Following an international search, Madhavan Swaminathan has been appointed as the new director of Georgia Tech’s 3D Systems Packaging Research Center (PRC).

Swaminathan is the John Pippin Chair in Microsystems Packaging & Electromagnetics in the School of Electrical and Computer Engineering (ECE) and the Founding Director of Georgia Tech’s Center for Co-Design of Chip, Package, System (C3PS). Prior to joining Georgia Tech in 1994, he was an engineer at IBM working on packaging for supercomputers.

“Swami is internationally recognized for his research in the area of electronics packaging, with a particular emphasis on signaling, power delivery, RF, chip/package co-design, and system integration,” said Oliver Brand, executive director of Georgia Tech’s Institute for Electronics and Nanotechnology. “With his long track record of engaging both faculty and industry partners, I am pleased that he will serve as the new PRC director and I look forward to working with him to further expand Georgia Tech’s strength in electronics packaging and system integration.”

Swaminathan is the author of 450+ refereed technical publications, holds 30 patents, and is the primary author and co-editor of 3 books – Power Integrity Modeling and Design for Semiconductors and Systems, Prentice Hall, 2007; Introduction to System on Package, McGraw Hill, 2008; and Design and Modeling for 3D ICs and Interposers, WSP, 2013. He has graduated 42 Ph.D. and 20 M.S. students during his career at Georgia Tech. Swaminathan is the founder and co-founder of two start-up companies, and the founder of an international IEEE conference, Electrical Design of Advanced Packaging and Systems (EDAPS), a premier conference supported by the Electronics Packaging Society.

Swaminathan’s research has been recognized with 21 best paper and best student paper awards. In addition, his most recent awards include the D. Scott Wills ECE Distinguished Mentor Award (2018), the Georgia Tech Outstanding Achievement in Research Program Development Award (2017), the Distinguished Alumnus Award from the National Institute of Technology Tiruchirappalli (NITT) in India (2014), and the Outstanding Sustained Technical Contribution Award from the IEEE Components, Packaging, and Manufacturing Technology Society (2014). He is an IEEE Fellow and has served as the Distinguished Lecturer for the IEEE Electromagnetic Compatibility Society.

Swaminathan received his B.E. Degree in Electronics and Communication from Regional Engineering College, Tiruchirapalli (now NITT) in 1985, and M.S. and Ph.D. degrees in Electrical Engineering from Syracuse University in 1989 and 1991, respectively. He succeeds Rao Tummala as the director of the PRC, which was founded in 1994. Tummala was a professor in the School of ECE and the School of Materials Science and Engineering.

“The PRC is the premier academic research center in the world focused on leading-edge packaging and heterogeneous integration. The PRC students, staff, and faculty are world class and this coupled with industry-centric research makes the center activities very unique,” Swaminathan said. “I am excited to lead the PRC into its next era where System on Package (SOP) technologies can serve as the platform to help redefine and continue Moore’s law.”

 

 

Research Areas

Design and demonstrate 2.5D and 3D interposers addressing electrical, mechanical and thermal barriers.
Panel-based ultra-thin glass as a high performance, high I/O density, and low cost platform.
All-Cu interconnections with and without solders for highest I/O density, high power handling, warpage reduction and system miniaturization.
Ultra-thin and high-performance 3D glass modules with double-side integration of actives and passives separated by 30µm.
Ultra-high bandwidth opto-electronic interconnections beyond TSVs by ultra-short optical vias in glass interposers at low power, low cost, and high alignment tolerance.
Advanced packaging technologies for automotive electronics – towards autonomous driving.