System integration and miniaturization requires advances in Moore Scaling (IC) and More than Moore Scaling (Packaging). The vision of the SRC program at Georgia Tech is to enable fundamental and applied research that enables the miniaturization of future systems through advances in both IC and Packaging.
MISSION AND RATIONALE
In 2009, the Interconnect and Packaging Center (IPC) was set up as a multi-university center supported by the Semiconductor Research Corporation with research focus on 3D Technologies, leading to 3D IC technology innovation, exploration, and discoveries. The Center was established to contribute towards the Global Research Corporation’s overall mission through a collaborative research program involving interconnect and packaging research at Georgia Tech (lead), Harvard University, Nanyang Technological University, Iowa State University, and University of Texas-Austin. The topics included research in 3D chip-package connections, with focus on architecture, design, fabrication, reliability and characterization. The goal of IPC was to enable a reduction in the footprint of chips by a revolutionary factor of 10 while both decreasing power consumption and increasing performance through 3D system integration over the next decade.
Since its initial inception, the focus of IPC has broadened to include research in electronics and nanotechnology that include electrical, mechanical, thermal, fabrication and assembly related issues pertinent to advanced devices, circuits, ICs, packaging and systems. The research projects are all supported by the Global Research Corporation. These research projects span a number of areas that address:
- Electrical: Architecture, Physical Design, Circuits, Modeling and Characterization
- Mechanical: Design, Thermomechanical reliability analysis, Stress analysis and management, Modeling and Characterization
- Thermal: Design, Advanced Cooling, Heat Transfer, Modeling, Characterization
- Technology: Advanced Substrate fabrication, TSV fabrication, bonding and integration
- Systems: Digital, RF, Mixed Signal and BioIn 2015, the IPC changed its name to the Center for Co-Design of Chip, Package, System (C3PS).
We thank SRC for providing financial support and collaborating with Georgia Tech over many years.
C3PS merged with PRC in 2019 resulting in a mega-center on advanced packaging and system integration.
• Madhavan Swaminathan • Muhannad Bakir • Suresh Sitaraman • Paul Kohl
• Azad Naeemi • Sudhakar Yalamanchilli • Saibal Mukhopadhyay
•Arijit Raychowdhury • Yogendra Joshi • Sungkyu Lim • Hua Wang
• Rao Tummala • C.P. Wong